• The XS1-U Series is a comprehensive range of 32-bit multicore microcontrollers that brings the low latency and timing determinism of the xCORE architecture to mainstream embedded applications. 
  • Unlike conventional microcontrollers, xCORE multicore microcontrollers execute multiple real-time tasks simultaneously. Devices consist of one or more xCORE tiles, each containing between four and eight independent xCORE logical processors. 
  • Each logical core can execute computational code, advanced DSP code, control software (including logic decisions and executing a state machine) or software that handles I/O. 


  • 16-Core Multicore Microcontroller with Advanced Multi-Core RISC Architecture
  • Up to 1000 MIPS shared between up to 16 real-time logical cores across two tiles
  • Each logical core has: 
  •     Guaranteed throughput of between 1/4 and 1/8 of tile MIPS
  •     16x32bit dedicated registers
  •     159 high-density 16/32-bit instructions
  •     All have single clock-cycle execution (except for divide)
  •     32x32!64-bit MAC instructions for DSP, arithmetic and user-definable cryptographic functions
  •     USB PHY, fully compliant with USB 2.0 specification 
  •     12b 1MSPS 8-channel SAR Analog-to-Digital Converter
  •     1 x LDO
  •     2 x DC-DC converters and Power Management Unit
  •     Watchdog Timer
  •     Onchip clocks/oscillators
  •     Crystal oscillator
  •     20MHz/31kHz silicon oscillators
  •     Programmable I/O
  •     73 general-purpose I/O pins, configurable as input or output
  •     Up to 25 x 1bit port, 7 x 4bit port, 3 x 8bit port, 1 x 16bit port, 1 x 32bit port 



  • The USB family includes the U16 device with two xCORE tiles, containing 16 logical processors.
  • The U10 device comprises 2 tiles, each containing five logical processors. Also included in the range are the U12 and U16 devices, each with 2 tiles containing 6 and 8 logical processors respectively. 
  Part Total xCOREs SRAM Kbytes I/O Max MIPS Package
XS1-U8-64 8 64 38 700 FBGA96
XS1-U10-128 10 128 78 1000 FBGA217
  XS1-U12-128 12 128 78 1000 FBGA217
  XS1-U16A-128 16 128 78 1000 FBGA217






Block Diagram

The devices include scheduling hardware that performs functions similar to those of an RTOS; and hardware that connects the cores directly to I/O ports, ensuring not only fast processing but extremely low latency. The use of interrupts is eliminated, ensuring deterministic operation.




XS1-U16A-128-FB217 Datasheet